MARC details
000 -LEADER |
fixed length control field |
01475cam a2200361 a 4500 |
001 - CONTROL NUMBER |
control field |
15449157 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
BD-ChIIU |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20230216020003.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
080912s2009 njua b 001 0 eng |
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
LC control number |
2008040479 |
015 ## - NATIONAL BIBLIOGRAPHY NUMBER |
National bibliography number |
GBA895702 |
Source |
bnb |
016 7# - NATIONAL BIBLIOGRAPHIC AGENCY CONTROL NUMBER |
Record control number |
014685264 |
Source |
Uk |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9789332550353 |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
DLC |
Transcribing agency |
BD-ChIIU |
Modifying agency |
BD-ChIIU |
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.39 |
Edition information |
23 |
Item number |
W853m 2009 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Wolf, Marilyn, |
Dates associated with a name |
1958- |
245 10 - TITLE STATEMENT |
Title |
Modern VLSI design : |
Remainder of title |
IP-based design |
Statement of responsibility, etc. |
Wayne Wolf. |
250 ## - EDITION STATEMENT |
Edition statement |
4th ed. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. |
Place of publication, distribution, etc. |
Noida, India : |
Name of publisher, distributor, etc. |
Pearson, |
Date of publication, distribution, etc. |
c2009. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
xxii, 627 p. : |
Other physical details |
ill. ; |
Dimensions |
25 cm. |
490 1# - SERIES STATEMENT |
Series statement |
Prentice Hall modern semiconductor design series |
504 ## - BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc. note |
Includes bibliographical references (p. [599]-612) and index. |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Digital systems and VLSI -- Fabrication and devices -- Logic gates -- Combinational logic networks -- Sequential machines -- Subsystem design -- Floorplanning -- Architecture design -- Appendix A: A chip designer's lexicon -- Appendix B: Hardware description languages. |
546 ## - LANGUAGE NOTE |
Language note |
English |
590 ## - LOCAL NOTE (RLIN) |
Linkage (RLIN) |
Md. Abdur Rahman |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Digital integrated circuits |
General subdivision |
Computer-aided design. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Logic circuits |
General subdivision |
Computer-aided design. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Design protection. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Intellectual property. |
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
Uniform title |
Prentice Hall modern semiconductor design series. |
856 41 - ELECTRONIC LOCATION AND ACCESS |
Materials specified |
Table of contents only |
Uniform Resource Identifier |
<a href="http://www.loc.gov/catdir/toc/ecip0828/2008040479.html">http://www.loc.gov/catdir/toc/ecip0828/2008040479.html</a> |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
Dewey Decimal Classification |
Koha item type |
Books |
Koha issues (borrowed), all copies |
2 |